Validating PowerPC Microprocessor Custom Memories

0740-7475/00/$10.00 © 2000 IEEE October–December 2000 DESIGN IS AN ITERATION of specification and implementation phases, performed either top-down or bottom-up before resulting in a product. Validation is performed at each of these design phases until the final manufacturing stage. Correctness of an implementation is not an autonomous concept, but rather a relation between a specification and an implementation. Design validation techniques attempt to establish a relation between the two entities. There are a number of approaches to design validation. No matter how they are categorized, the ultimate objective of these different approaches is to ensure that the final product satisfies customer requirements and does not fail during operation. Design validation techniques can be broadly categorized into simulation-based approaches and formal techniques. Due to the complexity of modern designs, validation using only traditional scalar simulation cannot be exhaustive and has proved to be ineffective in exposing hard-tofind bugs. This is because of the combinatorial complexity of the number of states and input sequences possible for a nontrivial design. Formal techniques do an exhaustive analysis of the design but can check only small designs completely. As the sizes and complexity of the designs keep growing, formal validation techniques suffer from the state explosion problem. Unless drastic innovations in data structures and proof systems come about, validation methodologies purely based on formal methods are currently neither feasible nor economical. Symbolic simulation has proved to be an efficient technique, bridging the gap between traditional simulation and full-fledged formal verification. Validating PowerPC Microprocessor Custom Memories